Who We Are
Intel Custom SOC Group is looking for a Physical Design Engineer to come and work on the latest server products.
Your responsibilities are as follows but not limited to:
Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product architecture.
Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.
Optimizes design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.
In addition to the skills listed above the ideal candidate will also have excellent communication, teamwork, and problem-solving skills. As well as a willingness to work independently at various levels of abstraction.
The ideal candidate will also have excellent communication, teamwork, and problem-solving skills.
Intel is in the process of securing office space in Fort Collins, Colorado. Once the site is operational, your position will follow Intel’s hybrid or onsite work model.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
Minimum Qualifications:
Bachelor's degree in electrical or computer engineering, or a related field with a year of related experience or a Master's degree in electrical or computer engineering, or a related field.
1 year experience with CMOS transistor level circuit fundamentals or VLSI hardware design.
6 months experience with APR tools, either Synopsys Fusion Compiler or Cadence Innovus.
6 months experience with the Static Timing Analysis (STA)
6 months experience with TCL, Python, or Perl programming
Preferred Qualifications:
Excellent communication and teamwork skills
Experience with Synopsys Fusion Compiler and PrimeTime
Electronic Design Automation tools, flows, and methodology
Circuit design
Layout cleanup expertise DRCs, density, etc.
Computer architecture
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 03/11/2026*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.